一 內容
1. Verification problems in SoC Designs.
2. Block, system, vs. SoC Verification.
3. Simulation-based verification. Testbench Authoring.
4. Assertion-based verification (ABV). Property specification language.
5. Simulation speed-up by emulation. Prototyping verification.
6. Formal verification techniques. Automatic test pattern generation (ATPG). Boolean Satisfiability (SAT). Binary Decision Diagram (BDD).
7. Semi-Formal verification.
8. Equivalence checking. Property checking.
9. Future SoC verification challenges and directions.

二 教科書
1. “System-on-a-Chip Verification - Methodology and Techniques”, Prakash Rashinkar, Peter Paterson, and Leena Singh, Kluwer Academic Publishers.
2. “Assertion-Based Design”, Harry Foster, Adam Krolnik, and David Lacey, Kluwer Academic Publishers.
3. “Writing Testbenches: Functional Verification of HDL Models”, Janick Bergeron, Kluwer Academic Publishers.
4. Class handouts/slides.

三 成績評量方式
1. Homework 30%
2. Mid-term exam 30%
3. Final exam or project 40%
四 預修課程 無